1. First stage is to
prepare the source code. In this case we would pick a simple 7 segment driver
counter and use VHDL:
2. Next the code will be
loaded and compiled in Quartus to test for basic syntax and other trivial
programming mechanics.
Once the code is tested, a
tcl script is created in preparation for simulation under ModelSim:
3. The design is loaded
into ModelSim and stimulus is applied in order to generate the wave form and
observe behavior. A small 7 segment display is built by the tcl script above
and connected to the output waveform:
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The
design is loaded into ModelSim and stimulus is applied in order to generate
the wave form and observe behavior. A small 7 segment display is built by the
tcl script above and connected to the output waveform. |
4. Then the compiled
binary is loaded into one of the development boards and it is executed in a
real-time lab. If the design allows live capture, it is so captured by lab
equipment:
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This specific design is loaded onto a low-end CPLD and
bread board. The objective is to test basic functionality without the effort
of going to full blown FPGA development board, boot loader and so forth. Because
the Altera CPLD is an EEPROM based device, the entire breadboard only
requires few components, clock source and power. |
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All
output pins are within the capture capability of logic analyzer and so the
entire waveform can be displayed and compared to the waveform generated by
ModelSim. |
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In our
case the two waveforms – synthetically simulated and captured in real-time
happened to match J |
5. And finally we have the
product values displayed on a 7 segment LED:
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Just to
be sure, an LED is connected via a driver IC directly into the same pins
where the logic analyzer was previously capturing the waveform above. The LED
is the ultimate confirmation that our VHD code does precisely what it was
supposed to do. |
6. At this point we can
proceed with Altium Designer PCB or close the project.
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Boring
rats nets wiring and IC placement |
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The
center piece is that FPGA IC |
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Fresh
out of the fab house, and ready for solder pasting and reflow toaster oven J |
